(China (Mainland))
Product Summary
The EPF10K70RC240 is the industry’s first embedded PLD. Based on reconfigurable CMOS SRAM elements, the Flexible Logic Element MatriX (FLEX) architecture of the EPF10K70RC240 incorporates all features necessary to implement common gate array megafunctions. With up to 250,000 gates, the EPF10K70RC240 provides the density, speed, and features to integrate entire systems, including multiple 32-bit buses, into a single device.
Parametrics
EPF10K70RC240 absolute maximum ratings: (1)Supply voltage With respect to ground: –2.0 to 7.0 V; (2)DC input voltage: –2.0 to 7.0 V; (3)DC output current, per pin: –25 to 25 mA; (4)Storage temperature No bias: –65 to 150 ℃; (5)Ambient temperature Under bias: –65 to 135 ℃; (6)Junction temperature Ceramic packages, under bias: 150 ℃, PQFP, TQFP, RQFP, and BGA packages, under bias: 135 ℃.
Features
EPF10K70RC240 features: (1)The industry’s first embedded programmable logic device (PLD) family, providing System-on-a-Programmable-Chip (SOPC) integration: Embedded array for implementing megafunctions, such as efficient memory and specialized logic functions, Logic array for general logic functions; (2)High density: 10,000 to 250,000 typical gates, Up to 40,960 RAM bits; 2,048 bits per embedded array block (EAB), all of which can be used without reducing logic capacity; (3)System-level features: MultiVoltTM I/O interface support, 5.0-V tolerant input pins in FLEX 10KA devices, Low power consumption (typical specification less than 0.5 mA in standby mode for most devices).
Diagrams
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 EPF10K70RC240-3 |
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IC FLEX 10K FPGA 70K 240-RQFP |
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EPF10K70RC240-4 |
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IC FLEX 10K FPGA 70K 240-RQFP |
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